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ISO2-CMOS MT8840 Data Over Voice Modem
Features
* * * * * * * * * * Performs ASK (amplitude shift keyed) modulation and demodulation 32 kHz carrier frequency Up to 2 kbit/s full duplex data transfer rate On-chip oscillator On-chip tone caller for alerting functions Adjustable tone caller frequencies Selectable self-loop test mode 5V/2.5mA power supply ISO2 -CMOS and switched capacitor technologies 18 Pin DIP MT8840AE MT8840AS
ISSUE 4
November 1990
Ordering Information 18 Pin Plastic DIP 18 Pin SOIC 0C to +85C
Description
The MT8840 is a carrier over voice modem which allows simultaneous transfer of voice and data over a single pair of wires. Data is transferred on an amplitude shift keyed (ASK) 32 kHz carrier. On-chip filters remove voice frequency signals from the received composite voice and data signal prior to demodulation. The modulating signal is a bit stream with a typical data rate of 2 kbit/s. In addition, the device contains a two tone warbler which functions as a telephone ringer. The device is fabricated in MITEL's double-poly ISO2-CMOS technology utilizing switched-capacitor techniques.
Applications
* * * Simultaneous data and voice communication in PABXs 2 kbit/s data modem "Smart" telephone sets
OSC1
OSC2
CK32
ETC MTC FATC
Timing and Control
Tone Caller
TCO
TxDI
Modulator
TX Bandpass Filter
TX PostFilter
RxDO
Demodulator
AGC
RX Bandpass Filter
RX PreFilter
R O U T I N G
TxO RxE RxI
DET
CRx
VDD
VSS
VRef
LOOP
Figure 1 - Functional Block Diagram
5-3
MT8840
ISO2-CMOS
DET CRx Rxl RxE LOOP VRef TxO TxDI VSS
1 2 3 4 5 6 7 8 9
18 17 16 15 14 13 12 11 10
VDD RxDO OSC2 OSC1 CK32 ETC MTC TCO FATC
18 PIN PLASTIC DIP/SOIC
Figure 2 - Pin Connections
Pin Description
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Name DET CRx RxI RxE LOOP VRef TxO TxDI VSS FATC TCO MTC ETC CK32 OSC1 OSC2 RxDO VDD Description Demodulator detection level adjust input (Analog). Internal resistor divider applies 2.36V in open circuit condition. Connection of external resistor will vary detect level. External AGC time constant adjust input (Analog). Connect external capacitor to VSS. Modulated receive signal input (Analog). Biased at VRef. Receive enable input (Digital) with internal pull up. Active high. Self-test mode select input (Digital) with internal pull down. Active high. Internal reference supply voltage input (Analog) . Modulated transmit carrier output (Analog). Transmit data input (Digital). Negative power supply. Tone caller center frequency adjust input (Analog). Tone caller output (Digital). Mute tone caller input (Digital) with internal pull down. Active high. Enable tone caller input (Digital) with internal pull down. Active high. 32 kHz data strobe output (Digital). Clock Input Clock Output to drive external devices. Positive power supply. 3.579545 MHz crystal connected between these pins completes internal oscillator.
Receive data output (Digital). Synchronized to CK32.
5-4
ISO2-CMOS
Functional Description
The MT8840 contains the modulator and demodulator circuitry for 32 kHz ASK signalling as well as a two-tone warbler (tone caller) to replace the function of the mechanical telephone ringer. A 32 kHz carrier is 100% amplitude modulated by the digital bit stream applied to input TxDI. This results in an amplitude shift keyed (ASK) 32 kHz carrier. A logical high at TxDI disables the carrier and a logical low enables it. The digitally modulated waveform is shaped by the Tx BANDPASS FILTER and smoothed by the Tx POST FILTER. The signal then enters the routing block where it is transferred to the TxO output. The modulated 32 kHz receive signal is applied to RxI. With a logical low applied to LOOP and a logical high applied to RxE, receive signals are routed to the Rx PREFILTER. High frequencies are removed by the Rx PREFILTER to prevent aliasing in the switched capacitor Rx BANDPASS FILTER. Voice signals are removed by the bandpass filter which is followed by an AGC circuit. This provides a dynamic range of 20dB for the receiver. An external 1F capacitor connected from CRx to VSS is required to control the AGC attack and decay time constants. Data is recovered from the received signal in the demodulator. The minimum voltage level to which the demodulator responds may be adjusted by connecting a resistor from DET to V DD or VRef. Since DET is the input to a comparator, noise should be kept to a minimum at this pin. The recovered receive data is synchronized to the leading edge of the 32 kHz clock (available at CK32) before appearing at RxDO. When in loop around mode, the Rx PREFILTER input is internally disconnected from the RxI input pin and connected to TxO. The transmitter output is still available at TxO. A two tone warbling audio signal is available at TCO when the tone caller enable input (ETC) is high. TCO is internally clamped to VRef when the tone caller is disabled. The tone output can be attenuated by 20dB if a logical high is applied to the tone caller mute input (MTC).
MT8840
Applications
Figures 3 through 5 show how the MT8840 may be utilized to transfer data and voice simultaneously over a single pair of wires in digital or analog PABXs and "smart" telephone sets. In all three figures a microprocessor sends/receives data to/from the MT8840 via a UART which converts the data format from parallel-to-serial or serial-to-parallel for the transmit and receive directions, respectively. In the receive direction the MT8840 has on-board filters to reject voice-band signals leaving only the 32 kHz carrier. This carrier is then demodulated to recover the received data. In the transmit direction the data to be sent is modulated and passed on to a summing circuit which sums the modulated 32 kHz carrier and voiceband signals for transmission over the telephone line. In the PABX the Filter/Codec has filters which reject the 32 kHz carrier from the received composite voice and data signal allowing only voiceband signals to pass through which are then PCM encoded for digital switching. However, in both the analog PABX and smart telephone set, lowpass filters could be included to bandlimit the received signal leaving only voice signals to be passed on to the switch array or handset earpiece.
5-5
MT8840
ISO2-CMOS
Tx Data Microprocessor UART MT8840
Tx Summing Circuit
Rx Data
Rx
PCM Highway
2W/4W Converter Tx FILTER/ CODEC (MT896X) Rx
Telephone line
Figure 3 - Digital PABX Block Diagram
Tx Data Microprocessor UART Rx Data MT8840
Tx Rx Summing Circuit
(Optional) LowPass Filter Tx Rx 2W/4W Converter Telephone line
To Another Telephone Extension
SLIC
Analog Switch Array (MT8804)
Figure 4 - Analog PABX Block Diagram
5-6
ISO2-CMOS
MT8840
Tx MT8840 Summing Circuit Rx
Tx Data UART Rx Data Microprocessor
Telephone line
2W/4W Converter
LowPass Filter (Optional)
Handset
Figure 5 - Smart Telephone Set Block Diagram
VDD
OSC1 MT8840 OSC2 C=33pF
MT8840
MT8840
OSC1
OSC2 C=1000pF
OSC1
OSC2
*** C=1000pF
VSS
When a single crystal is shared among a number of MT8840 devices, OSC1 and OSC2 should be a.c. coupled with a 1000 pF capacitor as shown above. This capacitor is not needed between the device with the crystal and the first driven device. A capacitor should be used in the first stage whenever such a chain of devices is driven from a clock instead of a crystal. A 33pF capacitor should be connected between OSC1 and VSS to compensate for the load on OSC2.
Figure 6 - Crystal Oscillator Connections for Driving Multiple MT8840s
5-7
MT8840
ISO2-CMOS
Absolute Maximum Ratings*
Parameter 1 2 3 4 5 Supply Voltage Voltage On Any Pin Current On Any Pin Storage Temperature Package Power Dissipation Symbol VDD-VSS VMax IMax TS PDiss -65 Min -0.3 VSS-0.3 Max +7.0 VDD+0.3 20 +150 850 Unit V V mA C mW
* Exceeding these ratings may cause permanent damage. Functional operation under these conditions is not implied.
Recommended Operating Conditions
Parameter 1 2 3 4 5 6 7 Operating Temperature Load Capacitance (TxO) Load Resistance (TxO) Operating Supply Currents Operating Supply Voltages Symbol VDD VRef IDD IRef TO CL RL 10 0 Min 4.75 Typ 5 0.4VDD 2.5 5.0 200 +85 50 Max 5.25 Unit V V mA A C pF K
D.C. Characteristics - VDD = 5.0 V 5%
Characteristics 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 A N A L O G I / O I / O D I G I T A L Input Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Output Drive Current
VSS =0V T = 0 - 85oC (All voltages are referenced to VSS /GND)
Sym IIN VIL VIH V OL VOH I OL IOH IIN RIN
Min
Typ
Max 10
Unit A V V V V mA mA mA mA
Test Conditions VIN = 0 to VDD
0 3.5 4.6 0.4 0.1 0.4 0.1
1.5 5.0 0.4
IOL = 0.4mA IOH = 0.4mA VOL = 0.4V VOH = 4.6V VIN = 0 to 5.0V
N Channel Sink (Except OSC2) OSC2 P Channel Source (Except OSC2) OSC2 Input Current (RxI, FATC) Input Resistance (FATC) (DET to VDD) (DET to VRef) Input Capacitance (RxI) (FATC) Any Digital Input Output Resistance (TxO) (TCO) (TCO) Output Offset Voltage (TxO)
10 500 170 23
A K K K pF pF
CIN
50 10 5.0 7.5
pF K K MTC = 0 MTC = 1 1
RO
100 3 30
VO
25
200
mV
22 Output Voltage (DET) VO 2.20 2.36 2.55 V See Note Notes: 1. Voltage specified is generated internally and measured with no external components connected to DET
5-8
ISO2-CMOS
A.C. Characteristics - VDD=5.0V5%
Characteristics 1 2 3 4 5 6 7 8 9 10 11 Crystal/Clock Frequency Clock Input (OSC 1) Rise Time Fall Time D I Duty Cycle G Clock Output (OSC 2) I Rise Time T A Fall Time L Duty Cycle Capacitive Load tLHCI tHLCI DCCI tLHCO tHLCO DCCO CLCO FC32 tLH32 tHL32 DC32 CL32 fW fLT fHT fHT/fLT tLHWO tHLWO DCWO VTCC fMOD VTxO VTxO tLHTxDI tHLTxDI fData ZIN VRxI VRxI fData 2 100 100 100 40 50 60 40 2 50 400 3.0 225 7.935 352 1036 440 1295 7.945 390 1148 487 1434 1.25 500 500 50 VDD 0.625 Modulated Frequency M O Output Level (TxO) D Output Level (TxO) U variation vs. VDD L A Transmit Data Input (TxDI) Rise Time T O Fall Time R Data Rate (TxDI) Input Impedance (RxI) Valid Input Level - Data (RxI) Valid Input Level - Data + Voice Receive Data Output (RxDO) Rise Time Fall Time Capacitive Load Duty Cycle
1. 2. V SS=0V T=0 - 85C (All voltages are referenced to VSS/GND)
MT8840
Sym fC
Min
Typ
Max
Unit MHz ns ns % ns ns %
Test Conditions OSC1, OSC2 10% - 90% of (VDD - VSS)
3.5759 3.5795 3.5831 100 100 40 50 100 100 50 30 32508 32541 100 100 50 100 7.955 428 1260 535 1574 32574 60
CL = 30pF, 3.58MHz ext. clock to OSC1
I / Clock Output (CK32) 12 O Rise Time 13 14 15 16 17 18 Fall Time Duty Cycle
pF Hz ns ns % pF Hz Hz Hz Hz Hz fc = 3.5795MHz 0.1% FATC = 0, fc= 3.5795MHz FATC = VDD, fc= 3.5795MHz FATC = 0, fc= 3.5795MHz FATC = VDD, fc= 3.5795MHz fc = 3.5795MHz 10% - 90% of (VDD - VSS) CL = 100pF
Capacitive Load Warbler Frequency (TCO)
Low Tone Frequency T O 19 N High Tone Frequency 20 E 21 Harmonic Relationship C 22 A Warbler Output (TCO) 23 L Rise Time L 24 Fall Time E 25 Duty Cycle R 26 Output Level (TCO) 27 28 29 30 31 32 33 34 35
ns ns % Vpp Vpp Hz 270
100K load to VRef CL = 30pF, MTC = 0 MTC = 0 MTC = 1 (100K load to VRef)
32541 250 100 100 100
mVpp VDD = 5V % ns ns k/bits See Note 1 K Vpp kbit/s ns ns pF % 10% - 90% of (VDD - VSS) CL = 100pF 32 kHz Input Frequency mVpp See Note 2
36 D 37 E M 38 O 39 D U 40 L 41 A T 42 O 43 R
Notes:
All A.C. parameters are based on a typical data rate of 2 kbit/s. Measured with no external resistor to DET input. Detection level internally set to 2.36V typical. 5-9
MT8840
ISO2-CMOS
A.C. Characteristics (Continued)
Characteristics 44 45 46 47
Notes:
Sym
Min 12 40
Typ
Max
Unit dB dB
Test Conditions Input Sig. (RxI) = 400mVpp fin = 0 - 5KHz
D E M O D
1. 2.
Inband Noise Rejection (S/N) Attenuation to Voice Signals Detect Filter Q Detector Center Frequency Q
3.8 32 kHz
All A.C. parameters are based on a typical data rate of 2 kbit/s. Measured with no external resistor to DET input. Detection level internally set to 2.36V typical.
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